The present invention relates to electronic computers and other control equipment and more particularly to a device used for controlling an address bus.
The recent improvements in semiconductor integrated circuit techniques not only make microprocessors and peripheral LSI circuits compact in size and light in weight but also improves the performance of microcomputers and increases considerably the address space. The number of address signal lines for transmitting address data is also increased with an increase in the address space. The reason is that since in a microcomputer various internal data are parallel-processed, one bus (signal line) is required for each bit. Therefore with increase in the address space, address buses consisting of 16, 24 and 32 signal lines are required. Therefore even when integrated circuits which essentially control the performance of microcomputers are made compact in size and light in weight and even when the number of ICs and LSIs used is decreased, the number of address buses, connectors and ICs for driving buses is increased. As a result, the overall systems cannot be made compact in size and light in weight.
In a prior art circuit, a CPU and a memory device are interconnected with 16 address buses which serve as parallel signal lines and a set of 16 lines is connected to a latch circuit in the memory device. However, each buffer in the CPU needs to drive extra lines so that a large output capacity is needed. As a result, a buffer circuit in a chip must be increased in size and consequently the CPULSI remains large in size.